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Contents in Brief

Preface

xiii

Part 1

FUNDAMENTALS

 

 

Section 1

 

 

 

ABSTRACTION AND NOTATION

3

CHAPTER

1

Computer Classes and Evolution

4

CHAPTER

2

Levels and Abstractions

9

CHAPTER

3

PMS Notation

17

CHAPTER

4

An Introduction to ISPS

23

 

 

 

 

 

 

Section 2

 

 

 

THE COMPUTER SPACE

33

CHAPTER

5

Function and Performance

39

CHAPTER

6

Structure

62

 

 

 

 

 

 

Section 3

 

 

 

COMPUTERS OF HISTORICAL SIGNIFICANCE

96

CHAPTER

7

The Manchester Mark 1

107

CHAPTER

8

Structural Levels of the PDP-8

110

CHAPTER

9

Design of the B 5000 System

129

CHAPTER

10

One-Level Storage System

135

Part 2

REGIONS OF COMPUTER SPACE

 

 

Section 1

 

 

 

MICROPROGRAM-BASED PROCESSORS

151

CHAPTER

11

Microprogramming and the Design of the

Control Circuits in an Electronic Digital

Computer

 158

 

 

 

 

 

 

CHAPTER

12

Microprogramming the IBM System/360

Model 30

164

 

 

 

CHAPTER

13

Bit-Sliced Microprocessor of the Am2900

Family: The Am2901/2909

 168

 

 

 

CHAPTER

14

The Am2903/2910

186

CHAPTER

15

A PDP-8 Implemented from AMD

Bit-Sliced Microprocessors

 219

 

 

 

 

 

 

 

 

 

Section 2

 

 

 

MEMORY HIERARCHIES AND MULTIPLE PROCESSES

227

CHAPTER

16

Burroughs’ B6500/B7500 Stack Mechanism

244

CHAPTER

17

An Outline of the ICL 2900 Series System

Architecture

 251

 

 

 

 

 

 

 

 

 

Section 3

 

 

 

CONCURRENCY: SINGLE-PROCESSOR SYSTEMS

260

CHAPTER

18

The IBM System/360 Model 91: Machine

Philosophy and Instruction-Handling

 276

 

 

 

CHAPTER

19

An Efficient Algorithm for Exploiting

Multiple Arithmetic Units

293

 

 

 

CHAPTER

20

The Illiac IV System

306

CHAPTER

21

A Productive Implementation of an

Associative Array Processor: STARAN

317

 

 

 

 

 

 

 

 

 

Section 4

 

 

 

MULTIPLE-PROCESSOR SYSTEMS

332

 

 

 

 

CHAPTER

22

The C.mmp/Hydra Project: An

Architectural Overview

350

 

 

 

CHAPTER

23

Pluribus: An Operational Fault-Tolerant

Multiprocessor

 371

 

 

 

 

 

 

 

 

 

Section 5

 

 

 

NETWORKS

387

CHATTER

24

The Interface Message Processor for the

ARPA Computer Network

402

 

 

 

CHAPTER

25

ALOHA Packet Broadcasting: A Retrospect

416

CHAPTER

26

Ethernet: Distributed Packet Switching for

Local Computer Networks

429

 

 

 

 

 

 

 

 

 

Section 6

 

 

 

FAULT-TOLERANT SYSTEMS

439

CHAPTER

27

The STAR (Self-Testing And Repairing)

Computer: An Investigation of the Theory

and Practice of Fault-Tolerant Computer

Design

448

 

 

 

 

 

 

 

 

 

CHAPTER

28

Fault-Tolerant Design of Local ESS

Processors

459

 

 

 

CHAPTER

29

The Tandem 16: A Fault-Tolerant

Computing System

470

 

 

 

vii

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