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Section 2

Computers with one central processor and multiple input/output processors

The computer structures discussed in this section are manufactured mainly by IBM. The reason for this bias toward IBM is that only fairly elaborate or very specialized structures have Pio's; computers of other manufacturers which have Pio's tend to have also the more general multiprocessing capability1 that would place them in Sec. 3.


The PDP-8 is presented in Chap. 5, and its 338 P.display appears in Chap. 25. Discussions are given in Part 2, Sec. 1 and Part 4, Sec. 1, respectively. For this section, the reader should look at the methods for transmitting data between Ms or T and Mp. Three methods are used: Pio or P.display is used to control T.displays (Chap. 25); Pc directly transmits a word to the buffer of a K for low-data-rate devices, here a K may request data, using the program interrupt; and a K transmits data directly to Mp.

The IBM 1800

Chapter 33 describes the 1Pc-9Pio IBM 1800 computer. There are five Pio types, depending on the components they control. Although we classify them as Pio's, they are barely processors since the instruction counter has a very restricted behavior. Unless the data channel has "data chaining" capability (in effect a jump instruction), it is not a processor.

The IBM 7094 II

The IBM 7094 II computer is discussed in Part 6, Sec. 1, page 515; its description appears in Chap. 41. The earlier 709 was about the first computer to use independent Pio's. UNIVAC (Chap. 8) has a very extensive K for data transmission concurrent with processing, whereas the 701 and 704 both required Pc to control each data word transmitted. The Pio's of the 7094 II might be looked at as an overreaction or overdesign inspired by the 701-704.

The structure of System/360,

Part I-outline of the logical structure

The structure of the 360 is presented in Part 6, Sec. 3. A discussion of an alternative implementation of the 360 by the authors of this book, using multiprocessors is given (page 585). Chapter 43 gives an overview of the ISP, and Chap. 44 presents the implementations of various 360 models. The implementations of physical processors to give multiple logical processors using microprogramming are interesting. IBM is rather conservative in regard to providing structures convenient for multiprogramming; and a multiprocessing design appears too complex for them to attempt outside a research environment.

The engineering design of the Stretch computer

Stretch (also known as Model 7030) and the UNIVAC LARC [Eckert, et al., 1959] are perhaps the first computers with the principal design goal of maximizing numerical computing power. Stretch, aptly named because of its influence on the technology (and on the IBM organization), was initiated by the Atomic Energy Commission at Los Alamos. It was designed to interpret large-scale scientific programs for nuclear engineering. Like a number of other high-risk major developmental efforts in the computer field, Stretch was not outstandingly successful as a computer system. Only a few (5 ~ 10) were built at a cost substantially exceeding their contract price and with performance only modestly better than the art at the time of their production. However, again in common with other similar efforts, they had a substantial positive effect on the state of the art. In the Stretch case, in particular, the 2.18-microsecond Mp core technology developed for Stretch was transferred to the 7090. In fact, this was a major contribution to why Stretch was only modestly better than 7090. The design goal was performance 100 times an IBM 704. The computer is described at a high level in Chap. 34. Buchholz's book on Project Stretch [Buchholz, 1962] is outstanding as a text on computer structures and as a description of Stretch. It should be read by all computer designers.

Computers built to maximize numerical computing power also include, besides the UNIVAC LARC for the Lawrence Radia-

1For example, the CDC-3600 [Casale, 1962], and the SDS Sigma 7 [Mendelson and England, 1966].


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