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560 BIBLIOGRAPHY

[Patil, 1978] Path, S.S., and T. Welch An approach to Using VLSI in Digital Systems. In 5th Annual Symposium on Computer Architecture. New York, ACM, pp. 139-143, April 1978.

[Phister, 1976] Phister, M.: Data Processing Technology and Economics. Santa Monica Publishing Co., Santa Monica, Calif., 1976.

[Popek and Goldberg, 1974] Popek, G.J., and R.P. Goldberg: Formal Requirement for Virtualizable Third Generation Architectures. Commun. A CM 17(7):412-421, July 1974.

[Rajchman, 1961] Rajchman, J.A.: Computer Memories: A Survey of the State-of-the-Art. Proc. IRE, pp. 104-127, Jan. 1961.

[Redmond and Smith, 1977] Redmond, K.C., and TM. Smith: Lessons from "Project Whirlwind." IEEE Spectrum 14(l0):50-59, Oct. 1977.

[Roberts, 1970] Roberts, L.G. (ed.): Computer Net work Development to Achieve Resource Sharing. AFIPS Conf Proc. SJCC 36:543-549, 1970.

[Rossman et al., 1975] Rossman, SE., C.G. Bell, M.J. Flynn, F.P. Brooks, Jr., SR. Fuller, H. Hellerman: A Course of Study in Computer Hardware Architecture. IEEE Comput. pp.44-63, Dec. 1975.

[Rothman, 1959] Rothman, S.: R/W 40 Data Processing System. International Conference on Information Processing and Auto-Math. Los Angeles, Ramo-Wooldridge, 1959.

[Scarott, 1965] Scarott, G.G.: The Efficient Use of Multilevel Storage. Washington, D.C., Spartan, p. 137, 1965.

[Scelza, 1977] Scelza, D.: The Cm* Host Users Manual. Department of Computer Science, Carnegie-Mellon University, Pittsburgh, July 1977.

[Schroeder and Saltzer, 1971] Schroeder, M.D., and J.H. Saltzer: A Hardware Architecture for Implementing Protection Rings. Proceedings, 3rd Symposium on Operating System Principles. Commun. ACM 15(3):157-170, 1972.

[Shannon, 1948] Shannon, C.E.: A Mathematical Theory of Communication. Bell Syst. Tech. J. 27:379-423, 623-656, 1948.

[Sharpe, 1969] Sharpe, W.F.: The Economics of Computers. New York, Columbia University Press, 1969.

[Siewiorek and Barbacci, 1976] Siewiorek, D.P., and MR. Barbacci: The CMU RT-CAD System -An Innovative Approach to Computer-Aided Design. A TIPS Conf Proc. NCC 45:643-655, 1976.

[Siewiorek et al., 1976] Siewiorek, D.P., M. Canepa, and S. Clark: C.vmp: The Analysis, Architecture and Implementation of a Fault Tolerant Multi processor. Computer Science Department, Carnegie- Mellon University. Pittsburgh, technical report A038633, Dec. 1976.

[Signetics, 1975] Introducing the Series 3000 Bipolar Microprocessor. Sunnyvale, Calif., Signetics Corporation, 1975.

[Simon, 1969] Simon, HA.: The Sciences of the Artificial. Cambridge, M.I.T Press, 1969.

[Singleton, 1969] Singleton, R.C.: Algorithm 347: An Efficient Algorithm for Sorting with Minimal Storage. Commun. ACM 13(3):185-187, March 1969.

[Sklaroff, 1976] Sklaroff, JR.: Redundancy Management Technique for Space Shuttle Computers. IBM J. Res. Dev. 20(l):20-28, Jan. 1976.

[Soha and Pohlman, 1974] Soha, Z., and W.B. Pohlman: A High Performance, Microprogrammed NMOS-LSI Processor for 8- and 16-bit Applications. NEREM pt. 2, 16:10-19, Oct. 1974.

[Spencer, 1978] Spencer, RE.: VLSI and Minicomputers. IEEE Compcon. Spring 1978.

[Stone, 1971] Stone, H.S.: Parallel Processing with the Perfect Shuffle. IEEE Trans. Comput. C 20(2):153-161, Feb. 1971.

[Stone and Siewiorek, 1975] Stone, H.S., and D.P. Siewiorek: Introduction to Computer Organization and Data Structures. PDP-I1 Edition. New York, McGraw-Hill, 1975.

[Strachey, 1960] Strachey, C.: Timesharing in Large Fast Computers. Proceedings of the International Conference on Information Processing, 15-20 June 1959, Paris, UNESCO, pp. 336-341, 1960.

[Strecker, 1970] Strecker, W.D.: Analysis of the Instruction Execution Rate in Certain Computer Structures. Ph.D. Thesis, Carnegie-Mellon University, Pittsburgh, 1970.

[Strecker, 1976] Strecker, W.D.: Cache Memories for PDP-1 1 Family Computers. Proceedings of the 3rd Annual Symposium on Computer Architecture, pp. 155-1 58, 1976. Reprinted as Chapter 10 in this text.

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