Section 2½ Microcomputers 611
Table 2 Microcomputers Based on Minicomputers
Intersil 6100 |
LSI-11 |
LSI-11/23 |
TI TMS9900 |
Micro Nova MN601 |
Fairchild 9400 |
|
Technology |
CMOS |
NMOS |
NMOS |
NMOS |
NMOS |
I2L |
Number of chips |
1 |
4 |
2 |
1 |
4 |
1 |
Number of pins per package |
40 |
40 |
40† |
64 |
40 |
40 |
Cycle time (m s) |
5 |
0.4 |
0.29 |
0.25 |
? |
0.1 |
Register move time (m s) |
N.A. |
3.5 |
1.7 |
4.7 |
2.4 |
1.5 |
Data-path width (bits) |
12 |
8 |
16 |
16 |
16 |
4 |
Maximum memory size (bytes) |
32K |
64K |
256K |
64K |
32K |
64K |
Microcode size |
. . . |
1,024 ´ 22 |
522 ´ 25 |
. . . |
. . . |
. . . |
Register file size |
1 |
26 |
16 |
16 (In memory) |
4 |
4 |
Stack size |
. . . |
In RAM |
In RAM |
. . . |
In RAM |
. . . |
Instruction set emulated |
PDP-8 |
PDP-11/40 |
PDP-11/34 |
TI-990 |
Data General Nova |
Data General Nova |
Year introduced |
1975 |
1975 |
1979 |
1976 |
1976 |
1978 |
† Two chips per 40-pin chip carrier.
(e.g., register file or memory buffer registers). See Part 2, Sec. 1. Microprogram sequencing is provided by incrementing a 4-bit microprogram counter, which is concatenated to an 8-bit ROM address register. Sequencing can be modified by a short jump (jamming a 4-bit microword subfield into the microprogram counter) or a long jump (by having 4 bits specify one of sixteen 12-bit addresses stored in an auxiliary ROM).
The 8086 has a two-stage pipeline composed of instruction fetch and execution. A 6-byte buffer allows prefetching of instructions during long-execution-time instructions and supplying instructions with no memory latency following short-execution-time instructions. The instruction execution stage of the pipeline also allows for partial overlap of current instruction execution with next instruction decoding.
Microcomputers Based on Minicomputers
Rather than evolve new instruction sets, some of the simpler existing instruction sets with large software bases could be implemented. Table 2 is a small sample of this growing class of microcomputer systems which are based on minicomputers. It is interesting to note that the PDP-8 was a very early, if not the first, minicomputer, and it was also implemented early as a one-chip processor. Chapters 49 and 31 describe microcomputer implementations of an HP 2116-like ISP. The HP 2116 is a 16-bit minicomputer with a close kinship to the PDP-8 ISP.
References
Adams [1978]; Holt [1974]; McKevitt [1979].