Section 2
Microcomputers
Historically, the semiconductor industry had focused its efforts on increasing the number of memory bits per chip. Controllers were built from SSI and MSI. Only when random-logic densities were great enough to fabricate several hundred gates per chip did LSI control elements become available. The first microcomputer chip set was introduced by Intel as the MCS-4 in 1971. The MCS-4 consisted of four different elements, all in 16-pin packages:
The processor consisted of about 2,200 transistors, or approximately 750 gates.
On account of the limited number of gates available, these early microcomputers exhibited a number of architectural anomalies: a limitation on the number of op codes, data-types, and addressing modes; limited data-path width; only partial support of some data-types; and limited interrupt capability, if any. An interesting performance anomaly was the relatively slow speed of the processor with respect to the memory and processor-memory bus technology. A single memory could support two to three processors concurrently without showing any degradation, whereas in most computer systems, memory performance is the chief limiting factor on processor performance. As the number of gates per chip has continued to rise, the architecture of microprocessors has become closer to that of larger mainframe computers. Chapter 36 extrapolates from technology trends in order to predict speed- power products, RAM and random-logic densities, and RAM and random-logic costs. Faggin (Chap. 36) also discusses the impact of these technology trends on microcomputer implementation, architecture, and software.
The microcomputer class has been very active with tens of architectures implemented in the first 6 years. Table 1 summarizes the characteristics of some of the more important microcomputers. As time has passed, these architectures have grown to 40-pin packages, 8- to 16-bit data paths, 64-Kbyte to 1-Mbyte address space, large instruction sets, sophisticated addressing modes, and more capable interrupt structures. Chapter 37 traces this evolution for one major manufacturer: Intel. The Intel 8086, which is described in detail, is an architecture exhibiting many of the properties of mainframe computers, including memory management, instruction and data address spaces, support for complex data-types including strings, instruction prefixes as instruction modifiers, and interlocks for multiple-processor systems.
The Intel 8086 control is implemented as a microprogrammed sequencer executing 21-bit microinstructions from a 504-word microstore [McKevitt, 1979]. The microword is kept narrow through the use of instruction register contents to specify ALU data length (e.g., 8 or 16 bits), ALU function, and operand location
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