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602 Part 3 ½ Computer Classes
Section 1 ½ Monolithic Microcomputers

Chapter 35

PlC1650: Chip Architecture and Operation

Frank M. Gruppuso

I. Introduction and Design Goals

The PIC1650 is an MOS/LSI circuit array containing RAM, I/O, a central processing unit, and a customer-defined ROM on a single chip. General Instrument (GI) architectured the PIC (Programmable Intelligent Controller) in 1976 to satisfy the need for a low-level, easy-to-use microcontroller. The only other microcomputer available at the time was the calculator-based design TMS 1000, and it was felt that a much more powerful machine could be built around a general-purpose-register, minicomputer-like architecture. Thus was laid the groundwork for the PIC 1650.

The PLC is fabricated in an N-channel MOS-process technology that permits fabrication of both enhancement- and depletion- mode transistors. Depletion-mode transistors allow low-voltage (5-volt) operation and, when used as internal load resistors, offer much better speed-power performance than enhancement-mode transistors used in a similar fashion.

As a controller, the PIC chip was designed to emphasize bit, byte, and register-transfer operations. Its main objectives would be to perform logical processing, basic code converting, and formatting, and to generate fundamental timing and control signals for various subservient I/O devices [PIC 1979a,b]. The emphasis was placed on the ability to provide control and interface functions rather than computing functions. The PLC was seen as a key element to providing so-called intelligence to long-established non-computer, small-system designs which, as it turned out, were mostly electromechanical in nature. Some of the initial proposals were for applications in vending machines, small dot-matrix impact printers, and metered mailing systems.

The following are several key issues which motivated the architecture and logic design.

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