Chapter 16½ Burroughs' B6500/B7500 Stack Mechanism 245
registers causes an operand to be pushed from the top-of-stack registers into the stack memory area. The stack pointer register (S) is incremented by one as each additional word is placed into the stack memory area; and is, of course, decremented by one as a word is withdrawn from the stack memory area and placed in the top-of-stack registers. As a result, the S register continually points to the last word placed into the job's stack memory area.
A job's stack memory area is bound, for memory protection, by two registers, the Base of Stack (BOS) register, and the Stack Limit (SL) register. The contents of the BOS register defines the base of the stack area, and the SL register defines the upper limit of the stack area. The job is interrupted if the S register is set to the value contained in either SL or BOS.
The contents of the top-of-stack registers are maintained automatically by the processor hardware in accordance with the environmental demands of the current operator syllable. If the current operator syllable demands that data be brought into the stack, then the top-of-stack registers are adjusted to accommodate the incoming data, and the surplus contents of the top-of-stack registers if any, are pushed into the job's stack memory area Words are brought out of the job's stack memory area and pushed into the top-of-stack register for operator syllables which require the presence of data in the top-of-stack registers, but do no explicitly move data into the stack.
Top-of-stack registers operate in an operand oriented fashion as opposed
to being word oriented. Calling a double precision operand into the top-of-stack
registers implies the loading of two memory words into the top-of-stack
registers. The first word is always loaded into the A register where its
tag bits are checked. If the word has a double precision tag, a second
word is loaded into X. The A and X registers are then concatenated to form
a double precision operand image. The B and Y registers concatenate when
a double precision operand is moved to the B register. The double precision
operand splits back to single words as it is pushed from the B and Y registers
into the stack memory area. The reverse process is repeated when the double
precision operand is eventually popped up from the stack memory area back
into the top-of-stack registers.
Three mechanisms exist within the B6500/B7500 Processor for addressing
data or program code: (1) Data Descriptor (DD)/ Segment Descriptor
(SD), (2) Indirect Reference Word (IRW), and (3) Stuffed Indirect Reference
Word (IRWS). The Data Descriptor (DD) and Segment Descriptor (SD) are B5500
carry-overs and provide the basic mechanism for addressing data or program
segments which are located outside of the job's stack area. The basic addressing
component of the descriptor is an absolute machine address. The Indirect
Reference Word (IRW) and the Stuffed Indirect Reference Word (IRWS) are
B6500/B7500 mechanisms for addressing data located within the job's
stack memory area. The addressing component of both the IRW and IRWS is
a relative address. The IRW is used to address within the immediate environment
of the job's stack, and addresses relative to a display register (described
later in Non-Local Addressing). The IRWS is used to address beyond the
immediate environment of the current procedure, and the addresses relative
to the base of the job's stack. Addressing across stacks is accomplished
with an IRWS.
In general, the descriptor functions to describe and locate data or
program code associated with a given job. The Data Descriptor
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