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Section 2½ Memory Hierarchies and Multiple Processes 243


alike. Keedy concludes with discussions of memory protection, the instruction set, and multiprogramming on the ICL 2900 series.

VAX-1 1/780

Chapter 42 describes the multiprocess environment and virtual memory for a computer with 32-bit virtual address space. A translation buffer (a cache for translated addresses) was added to the VAX implementation to lessen the performance impact of the complex address translation and protection checking algorithms.


Belady [1966]; Buzen and Gagliardi [1973]; Cleary [1969]; Denning [1970]; Dijkstra [1968b]; Feustel [1973]; Ibbett and Capon [1978]; Katzman [19711; Kuck [1978]; Lawson and Magenhagen [1975]; Liptay [1968]; Lipton [1973]; Meade [1970]; Mudge [1977]; Presser [1975]; Randell and Kuehner [1968]; Strecker [1976h].

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