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160 Part 2½ Regions of Computer Space Section 1 ½ Microprogram-Based Processors

control sections, the construction of these two sections may be identical except as far as the number of digits is concerned. In a new machine under construction in the Mathematical Laboratory, Cambridge, the registers are being constructed in basic units each containing five registers and an adder-subtractor together with the associated switching system. It is hoped that it will be possible to use identical units in the arithmetical unit and in the control register unit.

3. Example

An example will now be given to show the way in which a micro-programme can be drawn up for a machine with a single-address order code covering the usual operations. It is supposed that the arithmetical unit contains the following registers:

A Multiplicand register.
B Accumulator (least significant half).
C Accumulator (most significant half).
D Shift register.

The registers in the control register unit are as follows:

E Register connected to the access circuits of the store; the address of a storage location to which access is required is placed here.

F Sequence control register; contains address of next order due to be executed.

C Register used for counting.

It was assumed when drawing up the micro-programme that there was an adder-subtractor in the arithmetical unit with one input permanently connected to register D, and a similar adder subtractor in the control register unit with one input permanently connected to register G. For convenience it was assumed that the switching systems in each case were comprehensive enough to provide any micro-operation required. It was further supposed that the arithmetical unit provided for 20 digits and that the numbers 0, 1 and 18 could be introduced at will into one of the registers or the adder of the control register unit. Two conditional flip-flops are used. All micro-operations including those involving access to the store are supposed to take the same amount of time. Reference will be made to this point in §4.

Table 1 gives the order code of the machine, and Table 2 the micro-programme. Each line of Table 2 refers to one micro-order; the first column gives the address of the micro-order, the second

Table 1

Notation: Acc = accumulator

Acc, most significant halt of accumulator

Acc2 = most significant half of accumulator

n = storage location n

C(X) = contents of X (X = register or storage location)

Order

Effect of order

A n
S n H n V n T n
U n R n L n G n

I n
O n

C(Acc) + C(n) to Acc
C(Acc)
- C(n) to Acc C(n)toAcc2
C(Acc2)
. C(n) to Acc, where C(n)³ 0
C(Acc1) to n, 0 to Acc C(Acc1) to n
C(Acc)
. 2-(n+1) to Acc
C(Acc) . 2n+1 to Acc If C(Acc) < 0, transfer control to n; if C(Acc)³ 0, ignore (i.e., proceed serially) Read next character on input mechanism into n Send C(n) to output mechanism

column specifies the micro-operations called for in the arithmetical unit of the machine, and the third column specifies the micro-operations called for in the control register unit. The fourth column shows which conditional flip-flop, if any, is to be set and the digit which is to be used to set it; for example, (1)Cs means that flip-flop number 1 is set by the sign digit of the number in register C, while (2)Gl means that flip-flop number 2 is set by the least significant digit of the number in register C. In the case of unconditional micro-orders columns 5 and 7 are blank and column 6 contains the address of the next micro-order to be executed. In the case of conditional micro-orders column 5 shows which flip-flop is used to operate the conditional switch and columns 6 and 7 give the alternative addresses to which control is to be sent when the conditional flip-flop contains a 0 or a 1 respectively.

Micro-orders 0 to 4 are concerned with the extraction of orders from the store. They serve to bring about the transfer of the order from the store to register E and then cause the five most significant digits of the order to be placed in register II with the result that control is transferred to one of the micro-orders 5 to 15, each of which corresponds to a distinct order in the machine order code. In this way the sequence of micro-orders needed to perform the particular operation called for is begun.

The way in which the various operations are performed can be followed from Table 2. In the section dealing with multiplication, it is assumed that numbers lie in the range -1 £ x < 1 and that negative numbers are represented in the machine by their complements with respect to 2. It will be noted that the process of drawing up a micro-programme is very similar to that of drawing

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