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152 Part 2 ½ Regions of Computer Space Section 1½ Microprogram-Based Processors

small package count) and low-cost ROM and RAM, the advantages of microprogramming far outweigh the disadvantages. Microprogramming is found in several significant computer families (IBM System/360 and System/37O, Chaps. 40, 41, 51, and 52; PDP-11, Chap. 47), as well as in other diverse areas (e.g., hand calculators, Chap. 34; personal computers, Part 4, Sec. 3, and Chap. 33; and telephone switching computers, Chap. 28). It is interesting to note that the IBM Svstem/360 family was planned around microprogramming at a time when ROM technology was not a cost-effective competitor with hardwired logic. But given the rate of technological change and the projected life of the System/360 family, the decision to use microprogramming was the correct one and acted as a pull to develop cost-effective read-only memory technology.

Dimensions of Microprogram Space

Table 1 depicts the dimensions of the microprogram space. Each dimension will be briefly discussed

Microword Format. The single most important dimension is the form of the microword. If the word is frilly encoded, so that each possible bit pattern specifies a single sequence of data-path operations (instructions), the microword format is called vertical. Vertical microwords tend to be short (i.e., 16 to 40 bits). Vertical microprogramming is very similar to regular programming be cause of its sequential nature.

Horizontal microwords are wide (i.e., 40 to 100 or more bits). Each subfield controls a data function directly, and all the operations specified by the various subfields can be executed in parallel. Horizontal microword subfields require little (if partially encoded) or no decoding, thus saving the time required by a decoding circuit. Note that even a 10-ns decoding circuit represents a significant overhead for a machine that executes micro- words in 100 ns. Since horizontal microwords can also trigger several concurrent actions (if the data part supports concurrency), high-performance implementations almost always use a horizontal microword format.

Whereas vertical microprograms are characterized by long sequences of narrow microwords, horizontal microprograms are characterized by short, intertwined sequences of wide micro- words. In either case, designers attempt to decrease the length of sequences (i.e., by the use of microsubroutines) and/or the width of microwords (i.e., by encoding mutually exclusive operations) in order to minimize the microstore size. There is some evidence that, for a given ISP, the microstore size measured in bits, regardless of implementation, is relatively constant when compared to variations in microstore size between different ISPs.1

Table 1 Dimensions of the Microprogram Space

Microword format


Completely encoded


Partially encoded

No encoding

Microword decoding



Escape modes

Residual control

Microword sequencing

Microprogram counter

Next microinstruction address field

Microword sequence alteration

Microaddress alteration


Add (relative branch offset)


Repeat until condition

Return from subroutine

Microword constants


Emit field

Data-path concurrency


Multiple functional elements

Multiple data paths

Explicit bus control




Target instruction decoding


Op code used as microroutine address

ROM/PLA Branch Table

Modifications in microinstruction semantics

Fields from instruction register modify data-path functions and/or choose general register.

Microword Decoding. In static decoding the subfields in a microword have only one meaning for each decoding. Dynamic decoding, in which a single subfield has multiple meanings, is one way to shrink the length of a microword. The different meanings can be triggered by the escape mode, a special decoding of some other field, or in residual control they can be determined by state in the micromachine set by the execution of a previous instruction.

Microword Sequencing. Microword sequencing can be provided by a microprogram counter that is analogous to the program counter at the programming level. Higher-performance ma-

1The S/370 microstore sizes range from 380 to 560 Kbit for implementations without operating-system support (Chap. 52). PDP-11 microstore sizes range from 10 to 23 Kbit (Chap. 39).


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