Section 2 ½ The Computer Space 37
Table 1 (Continued)
PMS structure (Chap. 6; Part 2, Sec. 3,4, 5) |
Switching (Chap. 6; Part 2, Secs. 4, 5) |
Processor function(Chap. 6; Part 2, Secs. 1, 6, 7, 8) |
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1Pc |
1: n[duplex] |
P.microprogram |
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1 Pc[interrupt] |
Pc |
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1Pc-nPio |
n: m[time-multiplex] |
Pc[no io] |
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1 Pc-nPio-P[display] |
Pio |
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2C[duplex] |
2: n[dual-duplex] |
P.display |
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nPc[multiprocessing] |
n : m[cross-point] |
P.language |
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nPc-P[array½ special algorithm] |
P.array |
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nPc[parallel processing] |
P.vector move |
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C[network] |
P.algorithm |
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Network |
n/2 : n/2[non-hierarchy] |
P.fault.tolerant |
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Accessing algorithm(Chap. 6) |
Mp.size (Chap. 6) |
Ms.size (Chap. 6) |
Mp.speed (bis) (Chap. 6) |
Ms.speed (bis) |
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Linear [stack] |
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Linear [queue] |
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Bilinear |
Tape [large] |
>105 |
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Cyclic-random |
Disk [medium] magnetic card [large] |
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Cyclic |
Drum [large] |
Drum [small] photostore [large] |
>106 |
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Random |
Core [medium] |
Core [smaller] |
>107 |
>107 |
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Content |
Film [small] |
>108 |
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Associative |
Integrated circuit |
>109 |
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Multiprocess environment (Part 2, Sec. 2) |
Interprocess communication(Part 2, Sec. 2) |
Storage hierarchy(Part 2, Sec. 2) |
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1 process |
Subroutines and traps |
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1 process with interrupt-evoked processes |
Interrupts from I/O |
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1 process with multiple concurrent subprocesses (for example, 1Pc.nPio) |
Interprocessor interrupts |
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Monitor or fixed process (M) + one-at-a-time (variable) process |
Extracodes (programmed operators for monitor calls) |
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M + n swapped foreground/background process |
Mapping function |
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M + n processes (multiprogramming) with swapping No relocation 1 segment |
Synchronization |
Number of maps Allocation strategies Protection |
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M + n segments with shared processes Fixed-length paged segments |
Interprocess communication |
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Parallelism (Chap. 6; Part 2, Sec. 3) |
Overlap (Part 2, Sec. 3) |
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Serial by bit |
Processor-I/O |
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Serial by character |
Processor-memory |
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Parallel by word |
Processor units |
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Parallel by bit slice |
Memory units |
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Parallel by vector |
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Parallel by array |
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Multiple control units |
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Multiple functional units |
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Replication of processors, memory, I/O |