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6 Part 1 ½ Fundamentals Section 1 ½ Abstraction and Notation

of virtual address. Virtual address refers to the number of bytes independently addressable by the instruction set of the processor (ISP) (i.e., having unique names). (See Part 2, Sec. 2, for a more detailed discussion of virtual addresses.) Figure 2 plots the computers described in this book by bytes of virtual address according to date of introduction. The same four classes emerge: maxicomputers, minicomputers, microcomputers, and monolithic microcomputers. The number of bytes of virtual address doubles approximately every year (i.e., a byte-addressable ISP increases its address size by 1 bit per year). Thus, as each class evolves, new members of the class are expected to have increased capacity and functionality. Since, according to this metric, classes represent approximately constant price bands, the technology cost reductions serve to increase the capacity and functionality of a class.

On the other hand, technology cost reductions can he used to initiate new, less expensive classes with the same functionality offered by the next higher class several years before. For example, consider the early versions of the minicomputer (PDP-8), the microcomputer (Intel 4004), and the monolithic microcomputer (MCS-48). From Fig. 2 we would expect all three to have roughly similar capacity and functionality, though 5 and 10 years apart in time. It is extremely important to remember that all classes of computers have followed approximately the same evolutionary path as their capacity and functionality have increased. Thus, minicomputers began_ to include what had been maxicomputer concepts (e.g., caches, pipelining, and floating-point data-types) as soon as the economics of technology allowed (i.e., when the technology could support the added complexity without driving the system cost into another class). Microcomputers and monolithic microcomputers are evolving along similar paths, reflecting a similar time lag.

Not all concepts pass unchanged from one class to the next. For example, timesharing operating systems were developed to provide access to a costly, centralized maxicomputer system for many users, even at diverse locales. Timesharing systems were later applied to minicomputers. Because of their relatively low cost, microcomputers have not yet adopted timesharing facilities, even though several important concepts developed for time sharing, such as online file systems, have already been incorporated into the microcomputer class.

Newer computer classes benefit from the evolutionary process of older classes, adapting to proven concepts quickly where the older classes required a trial-and-error process. Despite the usefulness of understanding computers according to class, it is essential to remember that the principles of computer structures apply to all types of computer systems. Any principle or technique presented in this book can be used to describe any computer class, no matter when it evolved. Part 2 of the book systematically presents the general principles of computer structures, while Part 3 examines detailed variations as functions of constraints of the specific computer classes.

A few anomalies in Fig. 2 are worthy of comment. Several computers of the early maxicomputer class had a large number of addressable bytes. The Atlas and B 5000 heavily utilized less costly secondary storage to give the appearance of a large primary memory. Computers such as the IBM System/360 (a maxicomputer) and the VAX-11/780 (which bridged the gap between high-end minicomputers and low-end maxicomputers) provided an extra large virtual address to allow room for capacity expansion in future family members. The CRAY-1, although considered a maxicomputer, has addressability usually associated with a mini computer. Thus the CRAY can be regarded either as under addressed for a stand-alone maxicomputer or as a specialized computer (e.g., a vector processor) to be used in conjunction with other, more general-purpose machines.

Another view of capacity and functionality is provided by plotting the number of bytes of physical address by year of introduction, as shown in Fig. 3. This figure illustrates the maximum size of physical memory able to be implemented by the ISP-defined machine. The implemented memory may be substantially less than the virtual memory size on account of physical limitations and/or cost constraints. Figure 3 reinforces the concept of family, showing a slope that approximately doubles every 2 years (1/2; bit of addressability per year). The maxicomputers and the VAX-11/780 show reasonable alignment with their respective classes. The CRAY-1, however, still falls below the maxicomputer line.

Both Figs. 2 and 3 speculate on the next evolutionary class- monolithic systems. As semiconductor technology densities in crease, the contents of a single semiconductor chip will push out onto the nondigital system's functions. Monolithic systems will contain not only the computer and its memory but also input/out put devices such as A/D and D/A converters, sensors, actuators, and other specialized analog circuits. The trend towards monolithic systems has already begun with the integration of A/D converters into monolithic microcomputers (e.g., the Intel 8022).

Evolution of Computer Structures

As each computer class evolves, it frequently follows the exact sequence of events found in other computer classes. Part 1, Sec. 2, and Part 3 delineate the evolutionary stages.

The evolutionary process can also occur for subsystems within a single computer class. Myer and Sutherland [1968] recognized the phenomenon for the graphics output function (see Chap. 6). Figure 4 depicts the "wheel of reincarnation" for input/output controllers. The various positions of the wheel can be summarized as:

Position 1 The central processor (P) directly controls the I/O transducer (T) by issuing timed sequences of

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