Chapter 2l Design of an arithmetic unit incorporating a nesting store 265
or 8 places, and a left shift of 8 places; the paths from the B to the W registers provide the same shifts in the reverse direction. The two sets of shift paths are used alternately, those from the W registers being used first; all shifts are terminated using a path into the W registers. Shifts of a large number of places are accomplished by a series of shifts of eight places in the appropriate direction until the number of places remaining is less than eight; if necessary the number is then transferred back into the W registers: the remaining shifts, or the whole shift if the number of places is less than eight, is then completed by a transfer to the B registers and back again using two appropriate paths. With the shifts available, extension of the B registers by two bits at the right-most end enables any shift to be performed without loss of accuracy. In double-length arithmetic shifts, the sign digit of the less significant word is by-passed. When a shift is to be performed, the number of places and the type of shift are transferred into a semiautonomous unit, called the shift control, which is then supplied with a string of command pulses by the arithmetic unit control; shift control then re-routes these pulses to perform the transfers necessary to obtain the shift.
When performing floating-point addition and subtraction, shifts are required to equalize the characteristics of the two numbers; the amount of shift is calculated by a modified subtraction, operating on the characteristic positions of the two numbers. After the addition, the shift required to restore the result to standard form is determined by logical circuits which interpret the pattern of bits in W1 into shift information. The number of shifts performed during this standardising operation is made available to the arithmetic unit control for use in forming the correct characteristic of the result.
The character conversion operations to, and from, binary are accomplished by shift control, using a method involving successive shifting of the character word, and adding or subtracting portions of the radix word.
Examples of sequences
To illustrate the working of the arithmetic unit, two sequences are described.
a - D, (i.e. subtract the double-length fixed-point number in W1 and W2 from the number in W3 and the most accessible core register of the nesting store).
i Transfer W1, W2, W3 to B2, B! and Nb respectively, simultaneously reading from the core nesting store.
ii A dummy pulse.
iii Transfer the complement of W2 to B2 (but setting the sign of B2 positive), transfer W3 directly to B! (W3 has by now been filled with fresh data), switch the adder's output to W2, inserting a carry into the right-most adder stage, and read from the nesting store.
iv Add.
v Transfer the complement of W1 to B1 and Nb to B2, switch the adder's output to W1 and insert a carry into the right-most adder stage if W2 is negative.
vi Add, simultaneously clearing the sign of W2.
b + F (i.e. add the two single-length floating numbers in W1 and W2).
i Transfer the complement of W1 to B1, transfer W2 to B2 and switch the adder's output to register CD.
ii Store the characteristic of W1 in the eight-bit register C and add.
iii Clear the characteristic positions of W1, simultaneously transferring CD into the shift number register in shift control. This latter operation is such that the shift register contains minus the difference in characteristics.
iv Clear the characteristic of W2, and if W1 is about to be shifted, determined by the sign digit of CD, replace the contents of C by the characteristic of B2; thus C contains the larger characteristic.
v Supply control pulses to shift control and thus perform the required right-shift of eight W1 or W2.
vi Having completed the shift, transfer W1, W2 and W3 to B2, B1 and Nb respectively, simultaneously switching the adder's output to W1, clearing the carry into the right-most adder stage and reading from the core-nesting store.
vii Add the fractional parts, simultaneously transferring Nb to W2.
viii Supply control pulses to shift control so as to cause it to enter the standardization procedure and perform the shifts required.
ix Store the complement of the number of left-shifts performed in (viii) in the characteristic position of B2, transfer C to the characteristic position of B1, switch the adder to W1.
x Perform a special add operation which only affects the characteristic positions of W1.
The sum is thus formed in W1. Rounding the answer is carried out using two special control pulses which complete all floating point operations, these call up logic to deal with the cases when the rounding operation necessitates re-standardization of the result.