Processors constrained by a cyclic, primary memory
These processors use one extra (the + 1) address to specify the address of the next instruction. Obviously this address is used to allow complete freedom in the location of both operands and next instructions in an optimum manner. The IBM 650, a 1 + 1 address computer, is the most straightforward to understand. ACE and ZEBRA have subtle microcoded instructions to achieve powerful instruction sets. The LGP-30 and LGP-21 have a simple 1 address instruction format; they interlace several logical addresses between the physical addresses to help with the optimum location of operands.
The Olivetti Underwood Programma 101 desk calculator
The Programma 101 is a desk calculator computer implemented with a cyclic Mp. The cyclic memory is not apparent from the user's viewpoint because the response is adequate (less than 0.1 sec for simple arithmetic operations). The Programma 101 is discussed in Part 3, Sec. 4, page 235.
ZEBRA, a simple binary computer
The ZEBRA is presented in Chap. 12 and is discussed in Part 3, Sec. 1, page 190.
The LGP-30 and LGP-21
The LGP-30 (Chap. 16) is a first-generation, 31-bit computer with an Mp.cyclic and a very simple ISP. The computer appears to be characteristic of small-scale drum computers in the first generation. We think of this class of computer as having very little power when compared, for example, with the IBM 701. However, the power is mostly related to the drum-based technology, with 0.26 ~16.66 millisecond access times.
The Pilot ACE
The NPL Pilot ACE is presented in Chap. 11. Its relationship in the computer space is discussed in Part 3, Sec. 1, page 190.
The UNIVAC system
The UNIVAC I is described in Chap. 8. A discussion is given in Part 2, Sec. 1, page 91.
The design philosophy of Pegasus, a quantity-production computer
The Pegasus cyclic memory, general register computer (Chap. 9) is discussed in Part 2, Sec. 2, page 170.
IBM 650 instruction logic
The IBM 650 has a 1 + 1 address format and a very complete instruction set. Because of the long word length (10 decimal digits) we would consider it to have general utility. The 650's high performance is achieved by using a fast drum (6 milliseconds/revolution). The characteristics given in Chap. 17 present the machine as it was first introduced in 1954. Later versions provided options for floating point arithmetic and index registers. A 96-word core buffer was also added for disk and magnetic-tape buffering. The machine structure is a simple 1 Pc without concurrent processing and input/output transfer ability. Although the 650 has a large word, it initially processed only fixed point integers.
NOVA: a list-oriented computer
The NOVA (Chap. 26) is a specialized computer for processing array data. It is discussed in Part 4, Sec. 2, page 315.