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206 Part 3 The instruction-set processor level: variations in the processor

Section 1 Processors with greater than 1 address per instruction

Input-output registers

IOA 8-bit in-out register
IOB 36-bit in-out register
TWR 6-bit typewriter register
HPR 7-bit high-speed punch register

Word extension

D(u) 72-bit word whose right-hand 36 bits are the word at address u, and whose left-hand 36 bits are the same as the leftmost bit of the word at u.

S(u) 72-bit word whose right-hand 36 bits are the word at address u, and whose left-hand 36 bits are zero.

D(Q) 72-hit word-right-hand 36 bits are in register Q, left-hand 36 bits are same as leftmost bit in register Q.

S(Q) same as D(Q) except left 36 bits are zero.

D(AR), S(AR) are similarly defined.

L(Q)(u) 72-bit word-left-hand 36 bits are zero, right-hand 36 bits are the bit-by-bit product of corresponding bits of (Q) and word at address u.

L(Q')(v) 72-bit word-left-hand 36 bits are zero, right-hand 36 bits are the bit-by-bit product of corresponding bits of the complement of (Q) and word at address v.

Transmit instructions

111 Transmit Positive TPuv2: Replace (v) with (u).
13 Transmit Negative TNuv: Replace (v) with the complement of (u).
12 Transmit Magnitude TMuv: Replace (v) with the absolute magnitude of (u).
15 Transmit U-address TUuv: Replace the 15 bits of (v) designated by v15 through v29, with the corresponding bits of (u), leaving the remaining 21 bits of (v) undisturbed.
16 Transmit V-address TVuv: Replace the right-hand 15 bits of (v) designated by v0 through v14, with the corresponding bits of (u), leaving the remaining 21 bits of (v) undisturbed.
35 Add and Transmit ATuv: Add D(u) to (A). Then replace (v) with (AR).
36 Subtract and Transmit STuv: Subtract D(u) from (A). Then replace (v) with (AR).
22 Left Transmit LTjkv:
Left circular shift (A) by k places. If j = 0 replace (v) with (AL); if j = 1 replace (v) with (AR).

Q-controlled instructions

51 Q-controlled Transmit QTuv: Form in A the number L(Q)(u). Then replace (v) by (AR).
52
Q-controlled Add QAuv: Add to (A) the number L(Q)(u). Then replace (v) by (AR).
53 Q-controlled Substitute QSuv: Form in A the quantity L(Q)(u) plus L(Q')(v). Then replace (v) with (AR). The effect is to replace selected bits of (v) with the corresponding bits of (u) in those places corresponding to l's
in Q. The final (v) is the same as the final (AR).

Replace instructions

21 Replace Add RAuv: Form in A the sum of D(u) and D(v). Then replace (u) with (AR).
23 Replace Subtract RSuv: Form in A the difference D(u) minus D(v). Then replace (u) with (AR).
27 Controlled Complement CCuv: Replace (AR) with (u) leaving (AL) undisturbed. Then complement those bits of (AR) that correspond to ones in (v). Then replace (u) with (AR).
54 Left Shift in A LAuk: Replace (A) with D(u). Then left circular shift (A) by k places. Then replace (u) with (AR). If u = A, the first step is omitted, so that the initial content of A is shifted.
55 Left Shift in Q LQuk: Replace (Q) with (u). Then left circular shift (Q) by k places. Then replace (u) with (Q).

Split instructions

31 Split Positive Entry SPuk: Form S(u) in A. Then left circular shift (A) by k places.
33 Split Negative Entry SNuk: Form in A the complement of S(u). Then left circular shift (A) by k places.
32 Split Add SAuk: Add S(u) to (A). Then left circular shift (A) by k places.
34 Split Subtract SSuk: Subtract S(u) from (A). Then left circular shift (A) by k places.

Two-way conditional jump instructions

46 Sign Jump SJuv: If A71= 1, take (u) as NI. If A71 =0, take (v) as NI. (NI means next instruction.)
47 Zero Jump ZJuv: If (A) is not zero, take (u) as NI. If (A) is zero, take (v) as NI.

1Octal notation.
2Mnemonic notation.

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