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194 Part 3 ÷ The instruction-set processor level: variations in the processor

Section 1 Processors with greater than 1 address per instruction

source is the next to be obeyed. The structure of the instruction word is as follows:

Next instruction source

Digits 2-4


Digits 5-9


Digits 10-14


Digits 15-16

Wait number

Digits 17-21

Timing number

Digits 25-29

Go digit

Digit 32

The remaining digits are spare.

Coding of a problem takes place in two parts, in the first of which only the source, the destination and the period of transfer are specified, the last being a function of the characteristic, wait number and timing number. In the second part, the detailed coding, the other elements are added.

The sources and destinations

Simplest among the sources and destinations are those associated with the short delay lines. The six one-word delay lines are each given numbers and these for reasons associated with the history of the machine are 11, 15, 16, 20, 26 and 27. They are usually referred to as Temporary Stores or TS's because they are used to store temporarily those numbers which are being operated upon most frequently at each stage of a computation. In general TSn has associated with it a source, source n, and a destination, destination n. An instruction of the type


in the preliminary stage of the coding represents the transfer of a copy of the contents of TS15 via source 15 to TS16 via the destination 16. After it has taken place both stores contain the number originally in TS15. The period of the transfer is not mentioned in the coding because a transfer of more than one minor cycle is irrelevant. Most transfers are for one minor cycle and hence the period of transfer is not specified unless it is greater than one minor cycle. Associated with the TS's are a number of functional sources and destinations. TS16 for instance has two other destinations 17 and 18 associated with it, in addition to destination 16. Any number transferred to destination 17 is added to the contents of TS16 while any number transferred to destination 18 is subtracted from the contents of TS16. TS16 may be said to have some of the functions associated with the accumulator on an orthodox machine. The period of transfer to destinations 17 and 18 is very important. Thus

15-17 (n minor cycles)

has the effect of adding the contents of TS15, n times to the contents of TS16. This prolonged transfer is used in this way to give small multiples (up to 32) of numbers. Similarly, we may have

15-18 (n mc)

The instruction

16-17 (n mc)

is of special significance because it has the effect of adding the content of TS16 to itself for each minor cycle of the transfer, that is it gives multiplication by 2" or a left shift of n binary places.

TS26 has associated with it a number of functional sources. Source 17 gives the ones complement of the number in TS26, Source 18, the contents divided by 2, and Source 19, the contents multiplied by 2. The instruction

18-26 (n mc)

thus has the effect of dividing the contents of TS26 by 2", that is a right shift of n places. Similarly

19-26 (n mc)

gives a left shift of n places.

There are two functional sources which give composite functions of the numbers in TS26 and TS27. These are Source 21 which gives the number

TS26 & TS27

and Source 22 which gives the number

TS26 ¹ TS27

There are a number of sources which give constant numbers which are of frequent use in computation. These are Source 23 which gives the number which has a zero everywhere except in the 17th position, usually known as P17, Source 24 which gives P32, Source 25 which gives P1, Source 28 which gives zero and Source 29 which gives a number consisting of 32 consecutive ones. These sources are valuable because they provide numbers with an access time of one minor cycle and are thus almost as useful as several extra TS's.

The use of a number of TS's with the arithmetic facilities distributed among them makes it possible to take advantage of the placing of instructions in appropriate positions in the long

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