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USING LSI PROCESSOR BIT-SLICES TO BUILD A PDP-11 451

The processor's components are arranged in the diagram into three sections: the data part, control part, and Unibus interface. We were able to build the entire processor on a single board and Figure 2 is a top view of the CMU-11.

The Data Paths and Working Registers

The data part of the processor is designed around the 3002 (central processing element) bit-slice. A single 3002 circuit implements a 2- bit slice of the data paths and, hence, eight 3002s have been used in the CMU-11. Although not explicitly shown in Figure 1, the 3003 carry-lookahead circuit is also used. With the 3003, the 3002 array is capable of cycling through operations every 150 nanoseconds. However, other delays in the clock and control part dictate that the CMU-11 has a 200-nanosecond microcycle time. The eight general purpose working registers of the PDP-l1 architecture can be kept in the register scratchpad on the 3002s, and the three remaining internal registers, R8, R9, and T are sufficient for source and destination operand computations as well as other intermediate results. It was not possible to locate the program status (PS) and instruction register (IR) within the 3002s without a severe loss in performance.

Figure 2. CMU-11 processor board.

The relatively generous number of input and output lines of the 3002s are used to good ad vantage. The D<15:0> and A<15:0> buses feed the Unibus data and address lines respectively. In addition, the D bus allows access to the extra data paths necessary to include the PS register and to facilitate the byte swap operation needed by many of the PDP-11's instructions. The M<15:0> bus is used as the principal data input bus. The function bus, F<6:0>, specifies both the operation to be performed by the arithmetic/logic unit as well as the selection of the register in the scratchpad to be involved in the operation. The K<15:0> bus is used to input masks or constants from the microinstruction. The 3000 circuit set makes frequent use of the K lines to specify masks (usually all zeros or all ones) that effectively extend the operation code on the function bus.

Figure 3. CMU-11 system with associated PDP-11.

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