outputs are small, optimal testing is not significantly faster 'than exhaustive testing. Alternatively, these simpler modules can be tested as a part of a test system for a more complex module. Thus normal completion of the tasks of a test system imply all the modules forming the test system are acceptable. However, when several modules are concurrently under test an error indication might lead to a time consuming diagnosis to isolate the faulty module. For these reasons the following modules will be assumed to be tested exhaustively:
Example test systems using non-exhaustive schemes will be developed for the following modules:
The problem is to develop a test system for a read-write random access array memory module. Many of the concepts in test system design will be explored in detail in the following solution. Test systems for the other modules will thus only need to be sketched.
To test a module it is necessary to insure that the module performs its.. specified functions. The standard method for memory testing is to write a word into a memory cell and then later read the word and compare it to what was written. A mismatch indicates an error.
Solution 1 - Manual Testing
An RTM solution is shown in Figure 1. The memory address to be tested is read into the MA register from the switches. Likewise the test data is read into the B register from the switches. The memory address under test is written into and read out, and the two values compared. A mismatch indicates an error.
It is easy to see that this solution requires a significant amount of time to conduct the test, especially if the memory is large, because of the requirement of manual inputs. This method would be acceptable for M(transfer), however, since it has only one register. The system could operate at a higher speed by using a second switch register.
Solution 2 - Testing Against Known Results.
In Figure 2, two memories are used: one stores the tests and the other is the system under test. The former could be a read only memory.
The memory size is input via the switches to R. The test data is retrieved from memory 1 and placed in memory 2. Next, the test data is retrieved from
399
