1. Assuming event inputs of the form illustrated by the flow meter, design a special system which counts these events into a computer's memory.
a. When an overflow of a channel count occurs (i.e., the number is greater than 2^16-1) interrupt the computer, giving the channel number.
b. Use two memory locations to store double precision counts.
2. In the above design allow another set of inputs from incremental shaft position. The encoders present counts of + 1 and -1 together with reference positions (e.g., 0).
3. Further modify the design of the special interface to control the movement of a set of stepping motors of the type given above. The desired incremental positions are given in a table in the computer's memory, and the function of the special processor is to make certain that the correct step commands are issued. (Note, a stepping motor of this type will supply return information as- to when it has completed a step process.)
CLOCK-CALENDAR INTERFACED TO A COMPUTER
Design a clock-calendar, interfaced to a computer, using the T(program controlled) interface which is able to perform the following functions:
1. be reset under control of the computer to a specific time;
2. respond to queries for the time.
Assume a master clock of 100,000 KHz. Also, assume that the calender-clock is to operate for several years (e.g., 10) without resetting. There are at least two alternatives for representing time:
1. The clock can count in binary.
2. The clock can count in suitable (human) units: years, months, days, hours, minutes, seconds, fractional seconds.
The first alternative has simpler clock hardware and provides for simple operation (e.g., comparison, addition) in the computer. The second alternative is needed for human output. Also, in this latter case, the algorithm, is needed, in hardware, to deal with the calendar (leap years, and months). The length of the clock would be some multiple of 16-bit words. The following bits would be needed for the mixed base representation:
4 (10 years) + 4 (12 months) + 5 (31 days) $5 (24 hours) +
6 (60 minutes) + 6 (60 seconds) + 10 (1000 milliseconds) +
7 (100 10-microseconds) = 47 bits or 3 16-bit words.
Actually since there are only
12 x 31 x 24 x 60 x 10^3 x 10^2 = 3.19 x 10112 10-microseconds/year
and 2^48 256~ x 10^12, then the 48-bit clock can count for 80 years without intervention in the full binary representation.
The structure of the clock for the binary alternative is given in Figure CC-1. The data part consists of the two systems: the minicomputer and the RTM Bus. - They are linked together by the full duplex T(program controlled) interface. The data part of the RTM system holds the three words of the clock, C[1:3], and