in standard units. As the input events arrive (Figure EPUT-1b) they are counted and recorded in a memory (register). At the end of the time base, the results are displayed, the count is zeroed, and the next time base (counting period) is started. The system can also be used to measure the frequency of a sinusoidal input (Figure EPUT-1c) by adding an input section (Figure EPUT-1d) which amplifies the sinusoidal input (Figure EPUT-le) to produce 0 and 1 signals only. These are subsequently differentiated and clipped to allow only positive voltages (Figure EPUT-1f), which are used as a clocking input to Ev-flag.

PROBLEM STATEMENT

Design a general purpose EPUT meter.

DESIGN CONSIDERATIONS

The limit on the frequency of events is perhaps the principle design issue in this problem. As mentioned above, the end of the time base initiates a display of the event count, the count is zeroed and the next time base is started. All of these operations must be completed before the next event occurrence if all events are to be recorded. If the operations are not completed sufficiently rapidly, an event which occurs during the processing of the operations would be lost if another event occurred before the first event was counted. A partial solution to this problem is to allow a short interval of time between successive time periods during which events are ignored. This scheme would yield correct results for each individual time period, but would not reflect a true total count. Even using this scheme, the event frequency is limited by the speed with which the meter can update its event counter and/or the clock count. Again, if two events occur while the event or clock count is being updated, the first event of the two will not be counted. Similarly, the clock pulse frequency cannot be so high that two clock pulses arrive before the clock count can be properly updated (decremented).

SOLUTION

The structure (and behavior) of an EPUT meter is given in Figure EPUT-2. The data part requires two registers: UT to hold the unit time count (programmable clock); and EPUT to hold the event count. For greatest speed, two DMgpa's are used so that both registers can be incremented without extra transfer operations. The switch register in the T(lights and switches) holds the variable time base parameter for the programmable clock. The lights in the T(lights and switches) display the event count in binary. A clock pulse sets the DMflag (UT-flag) and an event occurrence sets the DMflag (EV-f lag). If no interval is allowed between time base periods, the maximum event-frequency is approximately 250 KHz. If an interval is allowed between sampling periods, this rate can be increased to approximately 500 KHz. The maximum allowable frequency for the clock pulses is 1 MHz.

ADDITIONAL PROBLEMS

1. Now were the frequency rates for the EPUT meter described above computed?

2. Would an increase or decrease of the clock pulse frequency allow a higher event frequency?

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