previous | contents | next

ADDITIONAL PROBLEMS

1. Implement higher precision floating point operations, e.g., a double word with an eight bit exponent and twenty-three bit mantissa.

2. Consider and implement a floating-point scheme in which the mantissa part is an integer instead. What are the advantages or disadvantages of this scheme?

BINARY CODED DECIMAL (8421 CODE) ARITHMETIC AND CONVERSION'

KEYWORDS: Subroutine, overflow, carry, arithmetic, BCD; straight-line, loop, data-representation

Binary coded decimal (BCO) arithmetic will be discussed because it is a necessary adjunct to the standard binary system. BCD is often used outside the RTM system for representing data in a form convenient for human handling. In these examples each decimal digit is represented using four bits in the standard binary encoding, hence the name 8421 code. The sixteen bits of an RTM register will hold four BCD digits, but with no provision for a sign-bit. A Boolean register, Sign-bit, will be used to store the sign of the BCD number; a 0 will represent a positive sign and a 1 will represent a negative sign. Thus, for example, +9015 would be represented in ,binary coded decimal as 0 1001 0000 0001 0101.

Each BOD character is a four bit pattern. A simple notational extension of decimal digits is used to refer to each of the 16 possible patterns, called hexadecimal digits:

 

For example, 1D3Fv16 is the 16 bit word 0001 1101 0011 1111.

PROBLEM STATEMENT

Design an RTM system to perform addition of two positive numbers expressed in binary coded decimal.

DESIGN CONSIDERATIONS

These are two possible strategies for operating on numbers expressed in BCD with RTM's: operate on the numbers in BOD form inside the system; or convert the BCD numbers to standard binary form on input, operate on the binary numbers, and reconvert the binary numbers to BCD form on output. The systems described below include systems which perform addition directly on the BCD numbers and systems for BCD-to-binary and binary-to-BCD conversions.

BCD ADDITION

The mechanics of BCD addition using binary registers will be briefly described to provide background for understanding the systems presented below. An example of BCD addition using binary registers is illustrated in Fig. BCD-la. First, binary addition is performed producing A+B. This operation produces some correct BCD digit results; however, corrections must be made to some of the other digit sums to produce the correct result in BCD. Since binary addition has been performed, the addition for each pair of BCD digits has been modulo 16

177

previous | contents | next