SOLUTION 1

This method assumes a variable, i, which can be counted down at each T' event; when i reaches 0 an output signal is generated and the count is reset to n, to begin the next countdown.

Figure CD-2a shows the data part of the design and one section of the control part that accepts time base clock pulse inputs from a conventional RTM K(clock). The data part requires an input interface, T(input) to input the variable time count, n. ** A **DMgpa contains i, the variable which is counted down to give the number of time base clock events. The time base is-generated by having the K(clock) set the. DMflag, Clock-Event. That is, the Clock-Event flag is set each time a clock event occurs and a second, independent clock-timing control part counts these clock events.

The completely independent clock-counting control part can be designed directly; a design is given in Figure CD-2b. For this control part, count variable, i, is first initialized to n. A loop is then entered which waits until the Clock- Event flag becomes 1. Upon detecting the clock event, i is counted down by 1. The process is repeated for each occurrence of the Clock-Event flag becoming a 1. When i __<__ 0, an output is generated and the clock counting process repeats. Thus, there are two independent control parts: the time basis generation which sets a Clock-Event flag; and a counting part which resets the Clock-Event flag.

There are several problems with this design as shown by the behavior in the figure which gives the number of outputs for each input value of n. If n is 0, the clock period is still 1, and if n is less than -1, then the clock period is also 1. One limitation arises from the fact that a signed two's complement number is assumed rather than an unsigned 16-bit number. In this way only half of the possible numbers are being used; since time is always positive, an unsigned convention should be used to give a greater range.

SOLUTION 2

In Figure CD-2c the test is changed to a 0 test condition at the end of the loop, thus assuming an unsigned number (i.e., the other 2^15 numbers can also be used). Now a wider range of numbers can be used, but there is still a problem that a period of 0 is perhaps ill-defined. The behavior for the control flowchart given opposite the design shows that an input parameter value yields 2^16 unique periods. Perhaps a period of n=0 should produce a better defined result. That is, for n=0 either a large (infinite) number or zero of output .events should be generated. The Figure CD-2c produced some low output rate. Note that in this design we have defined the K(wait-until) macro which we will include in the set of Extended RTM's, because it is frequently used. The following example problem describes this macro.

SOLUTION 3

The problem of an ill-defined case of n=0 can be solved by first checking for 0 before the waiting loop (see Figure CD-2d). A Kbranch has been added to check the initial condition before entering the loop.

One might think that the problem with this design is simply that we started off with a poor flowchart structure and then continued making modifications until a workable solution was found. The real problem, perhaps, is that the value of the number of times a loop is to be traversed should be checked before entering the loop. In this way anomolous cases will be sorted out without having the embarrassment of doing a loop one time when a parameter of 0 is specified. When neophyte Fortran programmers discover that giving an index count of 0 in

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