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receives a signal, called "activate", at its input terminal which activates the control; (2) Ke sends a signal, called "evoke-operation", to the data-memory part of the system to evoke the desired operation(s); (2) (3) when the operation(s) is (are) completed, the Bus control module sends a signal, Bus DONE\DONE, back to the Ke module at its operation-complete input; (4) Ke then passes control on to the next control module via its output signal, called "activate-next".

The block diagram for a Ke, with its input and outputs labeled, is shown-in Figure 10. Although th? Kevoke has four terminals, the actual PDP-16 module has only three terminals since the activate input and evoke-operation output are the same terminal. The operation-complete is not explicitly shown in RTM system diagrams because in the physical implementation it is prewired (the K modules plug into the control part of the-Bus) and is common for all K modules. Several K(evokes) are mounted on a single height, double length board.

K(branch 2-way)\Kb2. A Kb2 provides for the branching of control flow based on the condition of a Boolean data input variable. Each time a Kb2 is activated, it in turn, on activate-next, activates either of the subsequent control modules attached to it, depending on whether the Boolean input is true (a Boolean 1) or false (a Boolean 0). The block diagram for Kb2 with its two inputs and two outputs is shown in Figure 11. Note that although the rectangle- indicates an RTM component in general, -we also use the diamond to represent the decision taken by the branch. This convention is compatible with the general flowchart conventions (and also PDP-16). Several Kb2's are mounted on a single height, double length board.

DM(general purpose arithmetic unit)\DMgpa. The DMgpa is the workhorse of the modules of the data part of an RTM system because it carries out arithmetic and logic operations. Like most DM modules it can accept data from the Bus and place it, unaltered, in one or both of its two registers, or it can perform (possibly null) data operations on the contents of its registers and place the result on the Bus. These operations and results correspond to the righthand side and lefthand side respectively of a register. transfer statement, such as A <- B, or B <- A+B. The notation used for describing data operations lists the lefthand (destination) sides of these expressions as A <- and B <-. The corresponding righthand (source) sides are written, <- B, <- A+B. The arrow is used in both cages to avoid confusion about whether the register is source or destination. Notice that the DMgpa allows the same register to occur in both the source and destination parts of an evoked register transfer operation if desired.

The block diagram for a DMgpa is shown in Figure 12. A DMgpa has two 16 bit registers, designated A and B. These are declared as A<15:0> and B<15:0> within the figure. For arithmetic operations these registers are assumed to hold two's complement integers. The conventional arithmetic operations for a DMgpa are <- A+B, <- A-B, <- A+1, and <- A-1. In RTM system diagrams the evoking of one or more of these operations is indicated by drawing a dashed link from a Ke to the DMgpa and labeling it with the operation to be evoked. A given operation may be called by any number of Ke's, and a different evoke link is shown for each instance of that operation. In Figure 12 one such link is shown for each of the allowable DMgpa operations. Actually, in PDP-16 modules several operation inputs are available for each operation. The call for a given operation can be extended by using additional input gating logic (negative logic OR gates).

For logic operations registers A and B are assumed to hold bit vectors. The


2. Data transfers with multiple sources and/or multiple destinations are also possible under certain conditions. This will be described later.


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