**Chapter 29 The design of a general-purpose microprogram-controlled computer with elementary structure 343**

a register, called *J, *and one was a flip-flop, *TO, *in the alteration unit, thus allowing fixed sequence with a one-bit microprogrammed choice. This, incidentally, is the genesis of the name 'alteration unit.'

The SD-2 computer

Figure 1 is a block diagram of the computer. There will be, presently, a block-by-block description of the computer.

The two boxes on the left were added to facilitate input and output. The output buffer holds 20 words, and outputs all values in a 48-msec cycle, thus providing for nearly continuous outputs. The output distributor is a selection system which allows the programmer to transmit the contents of the accumulator onto one of eight channels to control external devices. The "inputs" line represents up to 32 channels which can be read into the accumulator. The numbers 8 and 32 are purely arbitrary; the upper limit of 32 is a microcode convenience only.

The alteration unit, in addition to its decision making duties, has several other functions. It has a five bit counter, used for microsubroutines, which can be set to any value chosen or to any number on the arithmetic unit. The alteration unit can sense when it goes from all zeros to all ones. In addition, the flip-flops controlling initial carry in the adder, end carry in shifting, and memory read or write control are in this unit.

Fig. 1. Computer block diagram.

Fig. 2. Arithmetic flow.

Figure 2 is a block diagram of the arithmetic unit. Information may be put onto the *b *bus from any register, or from outside sources, such as inputs, or constants from the microprogram unit; thence to the shift unit, and finally to the *d *bus. From the *d *bus, it may be sent to other places, such as the output distributor, microprogram register, etc., or to an arithmetic register.

Data and addressing between memory and the arithmetic unit have their own private channels, leaving the bus free during memory operation. The memory buffer and address register are a part of the arithmetic unit.

Figure 3 is an expanded view of this unit. Capital letters stand for registers, small letters for logical entities. Registers *A, B, C *and *E *are simply storage registers, and are used as the Accumulator, B-line, Counter and Extension (least significant arithmetic) register. The Distributor, *D, *is the memory buffer, and is often used as working storage. Registers *F *and *G *are the inputs to the adder logic. The a logic is the algebraic sum of *(F) + (G); e *is a rather weird logic, *(e *= *F *+ *G, *which is used in generating the extract order); *f, *which yields *FG + FG, *is used for the "exclusive" or generation; *c *is the carry logic; g is a constant emitter, under microprogram control; and *h *is a set of gates used for input.

As a number moves from *b *to *d, *one of five operations may be performed; *viz., *normal, shift left one bit, shift right one bit, complement or shift left *5 *bits. The last is used for automatic fill and in connection with the microprogram unit control.

As an example, to add the number in the A and *D *registers, three microprogram steps would be needed. First, transfer A to *G, D *to *F, *and finally a to *A; *12 m
sec would be required.