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Figure 4. Lincoln Laboratory TX-2 computer (courtesy of M.I.T. Lincoln Laboratory).

ward compatible fashion to include an index register and more instructions.*

Following the completion of the original TX- 0 at Lincoln, work began on what became the TX-2 [Clark, 1957; Frankovich and Peterson, 1957]. The TX-2 was a large machine, using 22,000 transistors compared to the 3,600 in the TX-0 (Figure 4). A principal design goal of the new machine was to create an I/O organization that would be far more efficient than that of existing machines. To accomplish this, the idea of a separate I/O processor was rejected, and a minimum buffering scheme with direct transfers to memory was chosen instead. Additional program sequences with associated program counters were provided to facilitate the I/O transfers, using the processing facilities of the central processor to effect the I/O transfers. This I/O system [Forgie, 1957] formed much of the basis for the PDP-l Sequence Break System and nearly all subsequent DEC computer de signs.

In addition to the I/O system improvements, the TX-2 featured increased parallelism. There were separate adders for indexing, program counter incrementation, and instruction execution. The increase in word length from 18 bits for the TX-0 to 36 bits for the TX-2 permitted the construction of a 36-bit arithmetic unit that could be reconfigured dynamically and in-


*The TX-O remained in service at M.I.T. until 1975, when it was purchased by DEC for display in the Digital Distributed Museum Project.

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